As is well known, a non-volatile memory is able to continuously retain data after the supplied power is interrupted. A flash memory is one of the most popular non-volatile memories. Generally, each cell of the flash memory has a floating gate transistor. The storing status of the floating gate transistor may be determined according to the amount of the stored charges.
Recently, a novel non-volatile memory with a resistive element as the main storage element has been introduced into the market. This non-volatile memory is also referred as a resistive random access memory (RRAM).
FIG. 1 is a schematic cross-sectional view illustrating a conventional non-volatile memory with a resistive element. This non-volatile memory is disclosed in U.S. Pat. No. 8,107,274 for example. As shown in FIG. 1, the non-volatile memory 300 has a (1T+1R) cell. The term “1T” denotes one transistor. The term “1 R” denotes one resistor. That is, the cell of the non-volatile memory 300 comprises a transistor 310 and a resistive element 320. The resistive element 320 is connected to the transistor 310. In addition, the resistive element 320 is a variable and reversible resistive element, and the transistor 310 is a switch transistor. When the transistor 310 is turned on, the resistive element 320 may be programmed or the storing status of the resistive element 320 may be read.
The transistor 310 comprises a substrate 318, a gate dielectric layer 313, a gate electrode 312, a first source/drain region 314, a second source/drain region 316, and a spacer 319. The substrate 318 is a well region.
The resistive element 320 comprises a transition metal oxide layer 110, a dielectric layer 150, and a conductive plug module 130. The dielectric layer 150 is formed on the first source/drain region 314. The conductive plug module 130 is disposed on the transition metal oxide layer 110.
The conductive plug module 130 comprises a metal plug 132 and a barrier layer 134. The metal plug 132 is vertically disposed over the transition metal oxide layer 110, and electrically connected with the transition metal oxide layer 110. The barrier layer 134 is arranged around the metal plug 132. The transition metal oxide layer 110 is formed by reacting a portion of the dielectric layer 150 with the barrier layer 134.
Moreover, for providing different resistance values, the transition metal oxide layer 110 may be selectively set or reset. Each resistance value is correlated with a storing status. Consequently, the transition metal oxide layer 110 may be used to store charges. In other words, the resistive element 320 may be used as a storage element. Generally, the action of setting the resistive element 320 is equivalent to a program action, and the action of resetting the resistive element 320 is equivalent to an erase action.
FIG. 2 is a plot illustrating the resistive characteristics of the transition metal oxide layer of the conventional non-volatile memory with the resistive element. For setting the transition metal oxide layer 110, a set voltage (e.g. about 3V) is provided to the transition metal oxide layer 110, so that the transition metal oxide layer 110 is in a first storing status and has a low resistance value. For resetting the transition metal oxide layer 110, a reset voltage (e.g. about 1V) and a rest current (e.g. 100 μA) are provided to the transition metal oxide layer 110, so that the transition metal oxide layer 110 is in a second storing status and has a high resistance value.
Moreover, during a read cycle, only a small read voltage (e.g. about 0.4V˜1V) is provided to the transition metal oxide layer 110. According to the magnitude of the corresponding read current, the storing status of the transition metal oxide layer 110 can be realized. For example, if the read current generated by the transition metal oxide layer 110 is lower than 5 μA during the read cycle, the transition metal oxide layer 110 is in the second storing status (i.e. with a high resistance value). Whereas, if the read current generated by the transition metal oxide layer 110 is higher than 5 μA during the read cycle, the transition metal oxide layer 110 is in the first storing status (i.e. with a low resistance value).
From the above discussions, a higher driving current is required to reset the transition metal oxide layer 110 of the resistive element 320. Due to the higher driving current, the size of the transistor 310 should be increased. However, the larger size of the transistor 310 results in the increase of the area of the cell structure. Under this circumstance, the storage capacity of the cell structure per unit area is reduced.